Citation link:
Authors:
Yordanov, Aleksandar; Йорданов, Александър
Title:
Test generator for examination of PLL and DDS systems
Date of Issue:
2008
Is Part of:
Proceedings of the Technical University – Sofia, 58(2), 2008, pp. 39-43
Publisher:
Технически университет - София
Identifiers:
1311-0829 [issn]
Type:
Article
Language:
eng
Abstract:
This paper describes a test generator for examination of digital and analogue phase locked loop and digital synthesizers. In practice very often are used signals with various types of shapes and frequencies. For high precision signals mostly are used PLL and DDS generators. The device described in this paper is based on a digital synthesizer and a phase locked loop. With this test generator could be examined different types of phase detectors and low-pass filters which are the essence of every PLL. An algorithm is proposed for assessment of phase locked loops.
Description:
Reviewer prof. Emil Dimitrov. - Incl. schemes - References, pp. 43
